There are two Trigger boards, L1 and L2, that have the same schematic design but different firmware in their FPGAs. L1 sums up the signals from a crate of ADC boards, and sends that to the MACTRIS boards, while L2 buffers data and sense it out, via ethernet cables, to the computer cluster (Mandolin).

Files for Trigger board revision C: Schematics (2,731 KB) Artwork (4,738 KB)

Files for prototype boards:

Trigger board revision B: Schematics (2,598 KB) Artwork (3,826 KB)

Trigger board revision A: Schematics (2,624 KB)

Trigger test board: Schematics (171 KB) Picture (300 KB)

Trigger test addon board: Schematics (15 KB)

Trigger Board, revision C2 (current version)